You will be part of the Macrocell Development Team responsible for designing and/or verifying secure IPs including communication protocols (SPI, I2C, USB, SWP, etc…), memory management unit and cryptographic algorithms (EDES, AES, etc…).
Requirements:
You are expected to be experienced / skilled in one or more of the following areas:
- Hardware Design Language, such as VHDL or Verilog;
- Digital simulation
- Synthesis and static timing analysis

Masters / Bachelor's Degree in Electronics' Engineering with more than 2 years relevant experience